High power semiconductor devices, such as high power transistor devices and high power Integrated Circuits (ICs), are used in wireless devices and systems that are required to operate at high powers. For example, high power RF transistor devices are used in power amplifier devices of base stations of a cellular network and are required to have an operating range from greater than 5 Watts to several hundreds of Watts and at frequencies from a few MHz to several GHz.
Traditionally, the active area of the high power RF transistor device is formed on a semiconductor substrate and wires or wire bonds are used to connect the active area of the device to the input and output leads which form the external connections of the device and to impedance matching components in output and input impedance matching networks. The impedance matching networks are used in order to increase the input and output impedances of the power RF transistor device and bring them as close as possible to the required impedance (50Ω) over the operating power and frequency range. Impedance matching networks typically include capacitors that are generally printed on a semiconductor or insulating substrate and also, the wire bonds themselves which not only act as connections but also as inductors in the output and input impedance matching networks. The inductance of a wire bond is determined by the length, height and shape of the wire bond and the coupling between neighbouring wire bonds. Thus, the configuration of the wire bonds is selected along with the configuration of the other impedance matching components to ensure proper impedance matching at the input and output of the power RF transistor device. As an example, a 120/150 W power transistor device at 2 GHz requires currently more than 100 wire bonds of predetermined heights, lengths and shapes.
At high power and frequencies, any variations in the actual value of each inductor formed by each of the wire bonds, as well as the coupling with adjacent wire bonds, can affect the impedance matching provided by the impedance matching networks and hence the performance of the power device. Thus, in order to optimise the performance of a power device, the configuration (e.g. height, length and shape) of the wire bonds needs to be well controlled during manufacturing.
As new wireless communication systems are requiring more stringent and more repeatable performances to cope with linearized and high efficiency amplifier architectures, in order to meet the requirements of such systems, the amount by which variations in the actual inductance of the wire bonds due to manufacturing tolerances are acceptable will be reduced. For example, variations in the inductance of wire bonds formed by a wire bonding tool having a tolerance of +/− 50 μm (which is not an untypical level of tolerance for current tools) may result in the device failing the requirements of new systems.
An article entitled ‘Passive Integration on Si for RF Circuits in Wireless Applications’ by N J. Pulsford, J T M. van Beek, M H W M. van Delden, A. Boogaard, and R F. Milsom in Microwave Symposium Digest, 1999 IEEE MTT-S International, Volume 4, Issue 1999, Page(s): 1897-1900 describes integrating high quality factor inductors and capacitors on a high ohmic silicon substrate to form a passive integration die so as to provide the possibility of integrated low loss resonator and matching circuits in RF wireless applications. Such an arrangement includes a bottom metal layer (200 nm) formed on the high ohmic silicon substrate, a thin dielectric layer (200 nm) and a top metal layer (7 μm) formed over the dielectric layer. No active devices are integrated in the high ohmic silicon substrate. The passive integration die is combined with the active silicon die using standard multi-die packaging techniques.
By integrating the inductors and capacitors on a separate high ohmic die to the active area, a higher Q factor can be achieved which improves device performance. However, such an arrangement requires two separate dies with one die being formed of high ohmic silicon. This increases the cost and complexity of manufacture of such a device. Furthermore, the described integrated arrangement provides sufficient low loss performance due to the high ohmic substrate when the operating power is low (<3 W), but the dielectric and resistive losses of such an arrangement would be too high for higher powers (>5 W) due to the losses through the 200 nm dielectric layer and 7 μm metal line and so this arrangement of integrating inductors onto a die cannot be used in high power devices operating at powers greater than 5 W.
An article entitled ‘Compact InP HBT Power Amplifiers Using Integrated Thick BCB Dielectrics’ by J. Hacker, W. Ha, C. Hillman, M. Urteaga, R. Pierson and B. Brar describes using 15 μm thick layers of benzocyclobutane (BCB) dielectric to provide low loss millimeter-wave transmission lines with much smaller dimensions compared to conventional microstrip placed directly on the semiconductor substrate. The described technique is applied to low power (1.1 W) integrated circuits and cannot be used for high power devices (>5 W) for which resistive losses will be too high due to the thin metal layers (μm range or less). Thus, such an arrangement cannot be used in high power devices operating at powers greater than 5 W.